Easier PLI integration with MPSim
Several engineers working and aspiring to work in the field of ASIC front-end design/verification tend to stay away from Verilog’s powerful PLI/VPI – some of them because they see it as old technology and many others – simply “FEAR” from it, thanks to its complex integration with the tools. For those who believe it is old technology – think again, most of the cutting edge EDA innovations (in front end) happening around verification use Verilog’s PLI/VPI to talk to your underlying simulator. To quote a few examples: NextOp /Atrenta’s BugScope Novas’s Verdi/Debussy Axiom’s @Designer http://www.axiom-da.com (Debugger that can work with all standard Verilog simulators) Trek from Brekersystems ( www.brekersystems.com ) OnPoint from vennsa-da.com Now for those who “fear” from VPI due to its integration challenges – to be fair – you’ve reasons to do so. However advanced functional verification solutions such as VCS, MPSim ( http://www.axiom-da.com ) provide a...