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Title: IEEE Design Automation Standards in India
Date: Tuesday, September 27, 2011
Time: 8:00 PM - 9:00 PM IST

For instance in the VLSI/EDA field there are several active standards such as:

•IEEE 1800 – SystemVerilog

•SV-AC assertions

•SV-EC – enhancements/TB

•Accellera VIP TSC – UVM

•IEEE 1647 – E language

•IEEE 1800 – PSL

•IEEE 1076 – VHDL

•IEEE 1801 UPF/Low Power

•IEEE 1666 SystemC

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