SystemVerilog Assertions’ field-day at Port city of Cochin!
TeamCVC ( http://in.linkedin.com/in/cvcblr ) is at Cochin, a famous port-city in South India ( http://en.wikipedia.org/wiki/Kochi ) this week on a “Mission SystemVerilog” at a customer site. It is a 4-day program covering: SystemVerilog basics for RTL designers ( http://www.cvcblr.com/trng_profiles/CVC_LG_SVD_profile.pdf ) System Verilog Assertions ( http://www.cvcblr.com/trng_profiles/CVC_LG_SVA_profile.pdf ) SystemVerilog for Verification engineers (VSV: http://www.cvcblr.com/trng_profiles/CVC_LG_VSV_profile.pdf ) The audience is a mix of young, enthusiastic engineers in their early-to-mid career – all very keen to hone their skills on SystemVerilog. Our CTO, Srini ( http://in.linkedin.com/in/svenka3 ) chose to customize the training in a timely manner to get the audience involved and interactive. During Day-2, it was a true “field-day of SystemVerilog Assertions”. Especially when it came to Sequence repetition operators, it was fun all across the roo...
Comments
Post a Comment